Instructions I

CPU flags register

In addition to registers, the CPU also contains a $64$–bit %RFLAGS register where individual bits are set or cleared in response to arithmetic and other operations. Separate machine instructions can manipulate some bit values, and their values affect code execution.

For example, the DF (Direction Flag) bit determines the direction of memory copy operations. It can be set by STD and cleared by CLD instructions. It has the default value of 0, and its location is shown in the figure below, where only the first 32 bits of 64-bit %RFLAGS are shown.

The fast way to fill a memory

The STOSQ instruction stores a quadword value from %RAX into a memory location, the address of which is in the %RDI register (the ‘D’ stands for destination). After the value from %RAX is transferred to memory, the instruction increments %RDI by ...